Syllabus for DAT Paper I & II Doctoral Admission Test 2015 rtu.ac.in : Rajasthan Technical University

University : Rajasthan Technical University
Announcement : Doctoral Admission Test RTU-DAT 2015
Facility : Syllabus

Syllabus : https://www.entrance.net.in/uploads/3146-RTU-DAT-Syllabus-Paper-I-II.pdf
Home Page : http://www.rtu.ac.in/RTU/

Syllabus for RTU-DAT Paper-I :
The syllabus for the above paper shall be divided in three parts:
1. English: Grammar, Vocabulary, Comprehension. (Constituting 20 marks, common for all RTUDAT applicants)

2. Mental ability and research aptitude: Mental ability, logical reasoning, statistical analysis, graph interpretation, Quantitative aptitude etc. (Constituting 60 marks, common for all RTUDAT applicants)

3. Department specific- In case of engineering disciplines the questions in this part will be based on the UG level syllabus of the individual department. In case of Business Administration and Computer Application the questions will be based on syllabus of major areas taught in these courses judging the general awareness in the subject area. (Constituting 20 marks, common for RTUDAT applicants of a particular department)

Syllabus for RTU-DAT Paper-II :
Discipline: Electronics & Communication Engineering
Specialization: Communication Engineering
1. COMMUNICATIONS SYSTEMS :
Basic information theory; Modulation and detection in analogue and digital systems; Sampling and data reconstructions; Quantization & coding; Time division and frequency division multiplexing; Equalization; Optical Communication: in free space & fiber optic; Propagation of signals at HF, VHF, UHF and microwave frequency; Satellite Communication. Characterization of communication signals, signal space representation, equalization, matched filtering, binary PSK, QPSK, FSK, QAM & MAry modulation techniques and their representation. Coherent & non coherent detection, carrier & symbol synchronization, bits v/s symbol error probability, bandwidth efficiency, Spread spectrum modulation: Pseudo noise sequences, DS & FH spread spectrum.

2. DIGITAL SIGNAL PROCESSING :
DFT & its properties. Decimation in time and decimation in frequency FFT algorithms, discrete cosine transform. IIR Filter design Butterworth design, bilinear transformation. Low Pass, High Pass, Band Pass and Band Stop digital filters. Spectral transformation of IIR filters. FIR filter design: Symmetric and antisymmetric linear phase. FIR filter by rectangular, triangular and Blackman window functions. Finite word length effects in FIR and IIR digital filters: Quantization, round off errors and overflow errors. Multi rate digital signal processing: Concepts, design of practical sampling rate converters, Decimators, interpolators. Polyphase decompositions.

3. ANTENNA THEORY AND TECHNIQUES :
Review of the theory of electromagnetic radiation. Introduction to various antenna types wire, loop and helical antennas, analysis using assumed current distribution.
Aperture antennas: slot, wave guide, horn, and reflector antennas. Analysis using field equivalence principle and Fourier transform methods. Linear arrays. Traveling wave & broadband antennas. Antenna measurements. Printed antennas: Feeding methods, transmission line & cavity models, analysis and design ofrectangular & circular microstrip antenna. Arrays: pattern synthesis, planar arrays, phased arrays. Active antennas and arrays. Paraboloidal reflector antenna, different feed configurations, shaped beam antennas, lens antenna. Antennas for biomedical applications. Smart antennas for mobile communications. Antenna for infrared detectors.

4. VLSI DESIGN :
Basic operation of CMOS inverter, detailed analysis of its noise margin propagation delay, power dissipation concept of layout & area, layout optimization & area estimation for a single as well as combinational logic circuits. Design of sequential logic circuits: Static & dynamic latches registers, dynamic transmission gate, CMOS gate, pipelining approach for optimize sequential circuits, NDRA-CMOS pipelined structure, nonbistable sequential circuits, Schmitt trigger. Implementation strategies for digital ICs, introduction of custom and circuit design, hierarchy cell based design array based implementation, building blocks of adder, multiplier, shifter, barrel shifter, algorithmic shifter and other arithmetic operators, power speed tradeoff in data path structure. Design memory & array structure memory architectures & building blocks, address decoder, sense amplifiers, driver/ buffers, timing control, power dissipation in memories, idea of testability and fault detection models.

5. HIGH FREQUENCY ELECTRONICS :
Analysis of planar transmission lines:
Variational method. losses in microstrip lines, analysis & design of devices; passive circuits, impedance transformers, couplers, power dividers, filters, oscillators, mixers, switches, amplifiers (narrow band /broad band) oscillators, active & passive phase shifters.